.. _design-miller-netlist:

Simulator input files (Spice Opus)
==================================

The circuit we are going to simulate is a Miller OpAmp. The amplifier 
schematic is in file `miller.sch <../../../demo/design/miller/miller.sch>`_ 
in folder `demo/design/miller/ <../../../demo/design/miller/>`_. 

.. figure:: design-miller.png
	:scale: 60%
	
	Miller OpAmp schematic.

We can see that all transistor dimensions, as well as the bias current, 
compensation resistor, and compensation capacitor are parameterized. We are 
going to use wrappers for builtin MOS devices so that we can model 
transistor's mismatch parameters. The two wrappers are defined in file 
`mosmm.inc <../../../demo/design/miller/mosmm.inc>`_ 
in folder `demo/design/miller/ <../../../demo/design/miller/>`_. 

.. literalinclude:: ../demo/design/miller/mosmm.inc
   :language: none
   
By default the netlister generates simulator's built-in MOS devices for every 
MOS symbol in the schematic. Instead we would like it to generate subcircuit 
instances that use the two definitions from ``mosmm.inc``. Beside that we want 
to add two mismatch parameters to every transistor. To achieve this we customize 
the netlister's behavior with file `netlister.json <../../../demo/design/miller/netlister.json>`_ 
in folder `demo/design/miller/ <../../../demo/design/miller/>`_. 

.. literalinclude:: ../demo/design/miller/netlister.json
   :language: none

This file defines the instance name prefix to be ``X`` (``NamePrefix``) and 
adds two parameters named ``vtmm`` and ``u0mm`` to every MOS isntance. The 
values of the two parameters are specified by parameters of the form 
``<instance_name>vt`` and ``<instance_name>u0``. If mismatch effects are 
not to be simulated these two parameters should be set to their default values 
(0). The actual built-in MOS instance is transistor M0 in every subcircuit 
instance generated by the netlister. 

After netlisting the following netlist is obtained in file `miller.inc <../../../demo/design/miller/miller.inc>`_ 
in folder `demo/design/miller/ <../../../demo/design/miller/>`_. 

.. literalinclude:: ../demo/design/miller/miller.inc
   :language: none

The top-level circuit schematic for the operating point, DC, AC, noise, and 
transient analysis is defined in file `topdc.sch <../../../demo/design/miller/topdc.sch>`_ 
in folder `demo/design/miller/ <../../../demo/design/miller/>`_. 

.. figure:: design-miller-topdc.png
	:scale: 60%
	
	Miller Top level circuit for dc, transient, and ac analysis. 

Note that we must suppress the netlister from adding ``.end`` to the netlist 
because the top-level circuit will be one of the include files in the top-level 
netlist. In this circuit the power supply (Vdd1), transient excitation (Vin1), 
common mode source (Vcom1), feedback (R1, R2), and load (Cl1, Rl1) load are 
parameterized. The amplifier output is separated from the feedback with a 
voltage-controlled voltage source so that the feedback circuit does not pose 
as an addittional load for the amplifier output. After netlisting the `topdc.inc <../../../demo/design/miller/topdc.inc>`_ include file is obtained. 

The top-level circuit schematic for computing rejection ratios is defined in 
file `toprr.sch <../../../demo/design/miller/toprr.sch>`_ 
in folder `demo/design/miller/ <../../../demo/design/miller/>`_. 

.. figure:: design-miller-toprr.png
	:scale: 60%
	
	Miller Top level circuit for ac analyses on which PSRR and CMRR computations are based.
	
For computing the rejection ratios we must obtain the gain from the power 
supplies (Vdd1, Vss1) and the common mode source (Vcom1) to the circuit's output. 
Capacitor Cin1 separates the differential excitation from shorting the DC 
feedback (R2) that forces the amplifier's operating point to be in the middle of the 
active region. Its value is determined by the ``cin`` parameter which is chosen to 
be large so that the effect of the separation vanishes quickly with the increasing 
frequency. After netlisting the `toprr.inc <../../../demo/design/miller/toprr.inc>`_  
include file is obtained. 



